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How the urei 1176 works - Theory Of Operation
Overview
Figure 1 shows the block diagram of the 1176LN Limiting Amplifier. Signal limiting and compression is performed by the Gain Reduction section. Before the signal is applied to the Gain Reduction section, the audio signal is attenuated by the Input stage. The amount of attenuation is controlled by the input control potentiometer. The amount of gain reduction as well as the compressor Attack and Release times are controlled by Gain Reduction Control circuit. After Gain Reduction a pre-amp is use to increase the signal level. The Output Control potentiometer is then used to control the amount of drive that is applied to the output amplifier. The 1176LN is a feedback style compressor since the signal level is sensed after the gain reduction is applied to the signal.
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1176 LN Input Section
The 1176LN Input Section is comprised of an adjustable passive attenuator followed by a transformer. The purpose of this section is to reduce the signal level so as not to overdrive the FET based gain reduction stage. Additionally, the adjustable input level is used to control the amount of compression. This input circuit was used in Revisions A-F. With Revision G, a differential op-amp input instead of the attenuator / transformer input stage was used.
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Gain Reduction Stage
This stage is the heart of the 1176LN limiter, and is where the actual signal compression takes place. Compression is achieved by a Field Effect Transistor (FET) which is used as a variable resistor. In the 1176LN, the FET acts like a resistor whose resistance is controlled by the voltage applied to its gate. The higher the voltage applied to the gate, the smaller the drain-source resistance will be. Figure 4 shows how the FETs resistance determines the gain of this section. Resistor R5 and the and the FET essentially comprise a voltage divider circuit. The lower the FETs resistance, the less gain this stage will have. As shown in Figure 4, the FET acts like a variable resistor, whose resistance is determined by the control voltage that is applied to it. Note that the greater the voltage applied to the gate of the FET, the less resistance, hence large signals cause the FET to reduce the gain. As we will see soon, a large input signal will result in a higher voltage from the Gain Control Circuit, which will lower the gain, hence reducing the signal level. This is the basis of the limiting action. Note that the 1176 is a feedback style compressor since the sidechain circuit samples the signal level after the gain reduction.
 Figure 4 - Using a FET as a voltage-variable resistor. The combination of R5 and Q1 acts as a voltage divider which controls the gain.
LN Circuitry
The LN circuit, which appeared in revisions C and later, was designed to reduce the distortion that the FET introduced in the gain reduction stage. FETs are inherently nonlinear devices, and any non-linear device will introduce signal distortion. The LN circuitry was designed to ensure that the FET stayed as much within a linear region as possible, thus reducing unwanted distortions. Much of what is now known about the operation and design guidelines of FETs was very new at the time the 1176 was designed. Initially, the decision was made to try to keep the LN circuit a secret and file for a patent. In order to accomplish this it was decided to build the LN circuit in a separate module. This module was then attached to the circuit board. The first revision to have the LN circuitry was revision C. This was accomplished by attaching an LN module to the revision B circuit board. This module turned out to be a problem to manufacture and the decision was made to revise the circuit board to accommodate the LN circuitry without the module. This then became revision D1.
Output Amplifier
The output amplifier is a Darlington pair followed by a class A stage based on a 2N3053 transistor. The 1176 output stage was essentially the same as the Universal Audio 1108 pre-amplifier. The output transformer is a custom transformer designed by Bill Putnam Sr. Aside from offering output impedance matching, the transformer forms an integral part of the feedback network used to stabilize the output stage. Note that later revisions (F and beyond) used a push-pull (class AB) output stage
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Gain Reduction Control Circuit
This circuit controls the amount of compression as well as the attack and release time of the limiter. The input to this circuit is taken from the output of the preamplifier section, just before the volume control potentiometer (R23). The compression ratio push-button switches determine the level of the signal which is sent to the to the sidechain. This determines the amount of compression. Transistor Q7 acts as a phase inverter which is followed by Q8 , an emitter follower. This signal then feeds CR3 as well as Q9 and Q10 which comprise another phase inverter / emitter follower combination. This is then fed to CR2. Note that the signal applied to CR2 is 180 out or phase with the signal at CR3. Since they are out of phase, the combination of CR2 and CR3 act as a full-wave rectifier. The output of the rectifiers are then filtered by C22 which smooths the signal. This DC voltage is proportional to the level of the input signal. A bias level is applied to the diodes by the Compression Ratio pushbutton switches. This controls the threshold of limiting, and is adjusted for the correct value as determined by the currently selected compression ratio selection. R55 controls the compressors attack time by regulating how fast C22 is charged. Likewise, R56 determines the compressors release time by controlling the rate at which C22 discharges. The output of this stage is then applied to the gate of the FET in the Gain Reduction circuit which in turn controls the gain in the manner previously described.
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